Neuromorphic computing

Mead’s observation was quantitative and uncomfortable: the nervous system was performing operations at a small fraction of the energy per operation that the digital hardware of the day required — a gap of orders of magnitude, far too large to be explained by process technology. It had to come from the style of computation.

What it is

Two commitments, which are separable and often confused:

• Analog, subthreshold operation. Run transistors in the regime where drain current depends exponentially on gate voltage. The device physics then performs the arithmetic directly — an exponential, a multiplication, a sum of currents at a node — instead of digital logic simulating it. Enormously efficient, and inherently imprecise.
• Spikes and events. Represent values in the timing of asynchronous events rather than in clocked words. No global clock, no activity where nothing is happening.

Why it matters

The efficiency argument holds up: sparse, event-driven, analog computation genuinely avoids costs that clocked digital designs pay unavoidably. Moving a word across a chip and back to memory dominates the energy budget of a conventional digital accelerator, and an architecture with local state and no clock simply does not incur that cost.

The honest difficulty is that precision and programmability were what digital computing bought with all that energy, and neuromorphic designs give both back. Analog devices drift, mismatch between nominally identical transistors is substantial, and there is no equivalent of a compiler for a substrate whose behaviour varies across the die. Every serious neuromorphic project has had to answer how you program the thing, and the answers remain less satisfying than the efficiency numbers.

This is worth stating plainly because the field’s rhetoric has often outrun its results. The energy argument is sound. The programming story is unfinished — which makes it interesting rather than settled.