Energy efficiency

Efficiency is the constraint that makes the two directions of this site meet most sharply. Implanted electronics must respect a thermal budget set by tissue; neuromorphic designers chase a power budget set by biology. Brains and chips both pay to move charge.

Where the brain’s 20 watts go

The human brain is about 2% of body weight but uses about 20% of the body’s oxygen, roughly 20 W. Attwell and Laughlin’s 2001 budget for rodent grey matter put most of the energy into signalling; Howarth and colleagues’ 2012 revision for cerebral cortex gives postsynaptic receptors half of that and action potentials a fifth.

In Hodgkin–Huxley terms the batteries are ion gradients: every spike and synaptic current runs them down, and the sodium–potassium pump recharges them at one ATP per three sodium ions. In 1998 Laughlin and colleagues, working on the blowfly retina, priced a bit at about $10^4$ ATP for a chemical synapse, and found weak, low-capacity pathways carry each bit more cheaply — efficient coding in joules.

Where a chip’s joules go

Logic pays for charge too: switching power is $P = CV^2 f$, for capacitance $C$ switched at supply voltage $V$ and clock rate $f$. In Horowitz’s 2014 accounting for a 45 nm process, a 32-bit integer add costs 0.1 pJ and a 64-bit access to off-chip DRAM 1.3–2.6 nJ — over ten thousand times as much, because the data has to travel.

For implants the limit is heat: ISO 14708-1 lets no outer surface of an active implant, cochlear implants included, run more than 2 °C above the surrounding 37 °C. Kim and colleagues found in 2007 that a Utah array with on-board electronics warms tissue by about 0.03 °C per milliwatt, so a device that size gets tens of milliwatts. In TMS, coil heating limits session length and pulse rate — the problem programmable waveforms attack.

Where they meet, and where they part

Both bills grow with distance — a spike must charge every branch it invades, a DRAM access must leave the chip — and the answers converge. Code sparsely: Lennie estimated in 2003 that spike costs may hold human cortex to under 1% of neurons substantially active at once, and an event camera, descended from the silicon retina, reports only changes in log intensity. Compute in analog with device physics, as neuromorphic engineering argues. Spread work over many slow channels, since pushing one faster raises the cost per operation: Laughlin’s weak pathways and the multicore processor at reduced voltage are the same trade.

Instruments feel the opposite pressure: a neuron spends more when it fires, a recording channel the same either way, because it digitises regardless. Neuropixels samples 384 channels at 30 kHz on a 17.5 mW base, and settled for 10-bit converters partly to save power.

The analogy breaks at the unit of account. Mead’s 1990 estimate of a billion-fold advantage for the brain over digital hardware counted each synaptic event as an operation, but a synaptic event is a noisy analog update and an instruction is exact. Sarpeshkar’s 1998 analysis found analog computation cheaper than digital only at low signal-to-noise ratio, crossing over near 8 bits for many common computations in the CMOS of the day. His own reading, offered as a hypothesis, was that the brain keeps each of its many wires on the cheap side of that line and uses spikes to restore the signals to discrete states — a hybrid of the two.